? semiconductor components industries, llc, 2015 september, 2015 ? rev. p2 1 publication order number: esd7205/d esd7205, szesd7205 product preview esd protection diodes low capacitance esd protection diodes for high speed data line the esd7205 transient voltage suppressor is designed to protect high speed data lines from esd. ultra?low capacitance and low esd clamping voltage make this device an ideal solution for protecting voltage sensitive high speed data lines. the small form factor, flow?through style package allows for easy pcb layout and matched trace lengths necessary to maintain consistent impedance between high speed differential lines such as ethernet and lvds present in automotive camera modules. features ? low capacitance (0.4 pf typical, i/o to gnd) ? diode capacitance matching ? protection for the following iec standards: iec 61000?4?2 level 4 (esd) ? low esd clamping voltage (12 v typical, +16 a tlp, i/o to gnd) ? sz prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable ? these devices are pb?free and are rohs compliant typical applications ? 10/100/1000 automotive ethernet ? lvds ? automotive usb 2.0 ? high speed differential pairs maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit operating junction temperature range t j ?55 to +125 c storage temperature range t stg ?55 to +150 c lead solder temperature ? maximum (10 seconds) t l 260 c iec 61000?4?2 contact iec 61000?4?2 air iso 10605 330 pf / 2 k contact iso 10605 330 pf / 330 contact esd 25 25 30 20 kv stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. marking diagrams sot?723 case 631aa pin configuration and schematic www. onsemi.com pin 1 pin 2 pin 3 see detailed ordering, marking and shipping information in the package dimensions section on page 6 of this data sheet. ordering information = xx = specific device code m = date code xx m 1 sc?70 case 419 (note: microdot may be in either location) xxm xx = specific device code m = date code = pb?free package 1
esd7205, szesd7205 www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current *see application note and8308/d for detailed explanations of datasheet parameters. uni?directional tvs i pp i f v i i r i t v rwm v c v br v f electrical characteristics (t a = 25 c unless otherwise specified) parameter symbol conditions min typ max unit reverse working voltage v rwm i/o pin to gnd 5.0 v breakdown voltage v br i t = 1 ma, i/o pin to gnd 5.2 6.0 8.0 v reverse leakage current i r v rwm = 5.0 v, i/o pin to gnd 1 a clamping voltage (note 1) v c iec61000?4?2, 8 kv contact see figures 3 and 4 clamping voltage tlp (note 2) v c i pp = 8 a i pp = 16 a i pp = ?8 a i pp = ?16 a 10 12.5 ?4.0 ?8.0 v junction capacitance match c j v r = 0 v, f = 1 mhz between i/o1 to gnd and i/o 2 to gnd 5 10 % junction capacitance c j v r = 0 v, f = 1 mhz between i/o pins 0.2 0.35 pf junction capacitance c j v r = 0 v, f = 1 mhz between i/o pins and gnd 0.4 0.55 pf 3db bandwidth f bw r l = 50 5 ghz 1. for test procedure see figures 5 and 6 and application note and8307/d. 2. ansi/esd stm5.5.1 ? electrostatic discharge sensitivity testing using transmission line pulse (tlp) model. tlp conditions: z 0 = 50 , t p = 100 ns, t r = 4 ns, averaging window; t 1 = 30 ns to t 2 = 60 ns.
esd7205, szesd7205 www. onsemi.com 3 figure 1. iv characteristics figure 2. cv characteristics figure 3. iec61000?4?2 +8 kv contact esd clamping voltage ?20 time (ns) voltage (v) 0 90 80 70 60 50 40 30 20 10 0 ?10 20 40 60 80 100 120 140 figure 4. iec61000?4?2 ?8 kv contact esd clamping voltage ?20 10 time (ns) voltage (v) 0 20 40 80 120 140 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 100 60 i (a) v (v) c (pf) vbias (v) 1.e?12 1.e?10 1.e?09 1.e?08 1.e?07 1.e?06 1.e?05 1.e?04 1.e?03 1.e?02 ?1 0 1 2 3 4 5 6 7 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0123 5 89 1.e?11 ?2 10 4 i/o?gnd
esd7205, szesd7205 www. onsemi.com 4 iec 61000?4?2 spec. level test volt- age (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000?4?2 w aveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 5. iec61000?4?2 spec figure 6. diagram of esd clamping voltage test setup 50 50 cable tvs oscilloscope esd gun the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000?4?2 waveform. since the iec61000?4?2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d.
esd7205, szesd7205 www. onsemi.com 5 figure 7. positive tlp iv curve figure 8. negative tlp iv curve note: tlp parameter: z 0 = 50 , t p = 100 ns, t r = 300 ps, averaging window: t 1 = 30 ns to t 2 = 60 ns. 14 12 10 8 6 4 2 0 02 18 16 14 12 46810 tlp current (a) voltage (v) ?14 tlp current (a) voltage (v) ?12 ?10 ?8 ?6 ?4 ?2 0 20 18 16 20 ?20 ?18 ?16 02 18 16 14 12 46810 20 6 4 2 0 10 8 equivalent v iec (kv) 6 4 2 0 10 8 equivalent v iec (kv) transmission line pulse (tlp) measurement transmission line pulse (tlp) provides current versus voltage (i?v) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. a simplified schematic of a typical tlp system is shown in figure 9. tlp i?v curves of esd protection devices accurately demonstrate the product?s esd capability because the 10s of amps current levels and under 100 ns time scale match those of an esd event. this is illustrated in figure 10 where an 8 kv iec 61000?4?2 current waveform is compared with tlp current pulses at 8 a and 16 a. a tlp i?v curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. figure 9. simplified schematic of a typical tlp system dut l s oscilloscope attenuator 10 m v c v m i m 50 coax cable 50 coax cable figure 10. comparison between 8 kv iec 61000?4?2 and 8 a and 16 a tlp waveforms
esd7205, szesd7205 www. onsemi.com 6 figure 11. rf insertion loss figure 12. capacitance over frequency capacitance (pf) frequency 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.e+00 5.e+08 1.e+09 2.e+09 2.e+09 3.e+09 3.e+0 9 3.3 v 0 v db frequency (hz) ?10 ?9 ?8 ?7 ?6 ?5 ?4 ?3 ?2 ?1 1.e+06 1.e+07 1.e+08 1.e+09 1.e+10 0 1 ordering information device package shipping ? esd7205m3t5g sot?723 (pb?free) 8000 / tape & reel szesd7205m3t5g* sot?723 (pb?free) 8000 / tape & reel esd7205wtt1g sot?323 (pb?free) 3000 / tape & reel SZESD7205WTT1G* sot?323 (pb?free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *sz prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable.
esd7205, szesd7205 www. onsemi.com 7 package dimensions sot?723 case 631aa issue d dim min nom max millimeters a 0.45 0.50 0.55 b 0.15 0.21 0.27 b1 0.25 0.31 0.37 c 0.07 0.12 0.17 d 1.15 1.20 1.25 e 0.75 0.80 0.85 e 0.40 bsc h 1.15 1.20 1.25 l e notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e do not include mold flash, protrusions or gate burrs. d b1 e b e a l c h ?y? ?x? x 0.08 y 2x e 1 2 3 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* l2 0.15 0.20 0.25 0.29 ref 3x l2 3x 1 2x top view bottom view side view recommended dimensions: millimeters 0.40 1.50 2x package outline 0.27 2x 0.52 3x 0.36
esd7205, szesd7205 www. onsemi.com 8 package dimensions sc?70 (sot?323) case 419?04 issue n a a2 d e1 b e e a1 c l 3 12 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 0.05 (0.002) 1.9 0.075 0.65 0.025 0.65 0.025 0.9 0.035 0.7 0.028 mm inches scale 10:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h e dim a min nom max min millimeters 0.80 0.90 1.00 0.032 inches a1 0.00 0.05 0.10 0.000 a2 0.70 ref b 0.30 0.35 0.40 0.012 c 0.10 0.18 0.25 0.004 d 1.80 2.10 2.20 0.071 e 1.15 1.24 1.35 0.045 e 1.20 1.30 1.40 0.047 0.035 0.040 0.002 0.004 0.014 0.016 0.007 0.010 0.083 0.087 0.049 0.053 0.051 0.055 nom max l 2.00 2.10 2.40 0.079 0.083 0.095 h e e1 0.65 bsc 0.38 0.028 ref 0.026 bsc 0.015 0.20 0.56 0.008 0.022 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 esd7205/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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